SOA Based All-Optical N-Bit-Binary Data Multiplier Design
Suresh Ponnan1*,
Saravanakumar Umathurai1, Revathi
Munirathinam2
2PSR Engineering
College, Department of Computer Science and Engineering, Tamil Nadu, India
Citation: Ponnan S, Umathurai S, Munirathinam R (2017) SOA Based All-Optical N-Bit-Binary Data Multiplier Design. J Nanomed Nanosci: JNAN-116. DOI: 10.29011/JNAN-116. 100016
1.
Abstract
1. Introduction
2.1. Semiconductor Optical Amplifier
The
increasing data traffic and the advantages of fiber optics for data
transmission are the basic reasons behind the interest in the development of
optical components, especially those capable to process the signals in the
optical domain without the need of cumbersome opto-electro-optical conversions.
Such a component, with central interest in fiber communications is the
Semiconductor Optical Amplifier (SOA) and it is shown in (Figure 1).
The
reason behind the growing interest in SOAs is their ability to amplify and
process optical signals in a wide range of bit rates at modest bias power
requirements and in a tiny volume [5]. (Figure
1) depicts the basic structure of a SOA. The incoming optical beam is
coupled into the active waveguide of the SOA. The free carrier population in
the active region is inverted by electrical pumping providing optical gain.
Thus, the optical beam is amplified during the propagation along the active
waveguide and emerges from the opposite facet of the chip. SOAs are compact,
electrically pumped and have a large optical bandwidth. Moreover, the
semiconductor technology offers a wide flexibility in the choice of the gain
peak wavelength by just appropriately choosing the material composition of the
active layer. Another key advantage is that these devices can be integrated
with other active or passive optical components to generate more complex
functionalities. Finally, they are potentially cheap, according to the mature
technology and economics of scale. The
SOA is of two types: Fabry-Perot amplifier shown in (Figure
2) and travelling wave amplifier shown in (Figure
3).
In Fabry-Perot amplifier the light entering active region is reflected several times from cleaved face and is amplified as it leaves the cavity. The travelling wave amplifier is an active medium without reflective facets. So that the input signal is amplified by a single passage through active region.
3. Optical Multiplier
For the past several years, scientists have been trying to use the advantages in optics in data and signal processing because of its high speed, bandwidth, response time, and low noise etc. over electronics. All-optical combinational & sequential logic circuits and many other such devices are already developed. The prime motive in optical computation is to achieve the super-fast computation which is totally controlled by all-optical techniques. The multiplier is a basic requirement in a data processing [5]. It multiplies the N*M bit. Here, the binary logic state ‘1’ and state ‘0’ are encoded by the optical beams of frequency ‘v2’ and ‘v1’, respectively. Let two two-bit binary numbers are A = (A1A0) and B = (B1B0). Their multiplication gives the result Y = ‘S3S2S1S0’. The optical multiplier is designed by using all optical AND and Optical HALF Adder.
3.1. Optical and Gate
The all-optical AND gate is one of the fundamental logic gates because it is able to perform the bit-level functions such as address recognition, packet-header modification, and data-integrity verification. The optical and gate consists of add drop mux, SOA and WDM. The channels of WDM are varied to perform AND operation [6].
3.2. Optical XOR Gate
The all-optical XOR gate is a key technology to implement primary systems for binary address and header recognition, binary addition and counting, decision and comparison, encoding and encryption, and pattern matching.
3.3. Optical Half Adder
The
optical half adder adds two input bits and generates a carry and sum, which are
the two outputs of a half adder shown in (Figure
4).
The
input variables of a half adder are called the augend and addend bits. The
output variables are the sum and carry and its corresponding truth table is
shown in (Table 1).
3.4. Two Bit Binary Multiplier
The all optical circuit for
implementing the frequency encoded multiplication operation is shown in (Figure 5).
It is consisting of four all
optical AND logic gates and two half adders. Input data of AND1 is A0, B0; for AND2 is A0, B1; for AND3 is A1, B0;
for AND4 is A1, B1. The output of AND1 gives Least Significant
Bit (LSB) ‘S0’ of the multiplication. Output of the AND2 and AND3 are used as
the input of HA1.Sum of HA1 is transmitted to ‘S1’and carry is added with the
output of AND3 by means of HA2 which finally gives ‘S2’ and carry ‘S3’.
Where,
S0=AB; S1= (A0B1) XOR (A1 B0); S2= (A1B1) XOR (Carry); S3= Carry;
The optical two-bit binary data multiplier has sixteen
cases for different states. Some of the input combinations and corresponding
output spectrums are given below. Here, there are two different types of input
beams. To represent the logic state 1 v2 is used. To represent the logic state
0 v1 is used. This shows the output spectrum of the input ‘1000’. The result of
output spectrum is ‘0000’ and it is shown in (Table 2).
And its corresponding output is shown in (Figure 6).
4. Results
A Binary Multiplier is a digital circuit used in digital electronics to multiply two binary numbers and provide the result as output. The method used to multiply two binary numbers is similar for multiplying decimal numbers which is based on calculating partial product, shifting them and adding them together. Similar approach is used to multiply two binary numbers. Long multiplicand is multiplied by 0 or 1 which is much easier than decimal multiplication as product by 0 or 1 is 0 or same number respectively. The two numbers A1A0 and B1B0 are multiplied together to produce a 4-bit output S3S2S1S0. The optical two-bit binary multiplier is shown in (Figure 6).
5. Conclusion
The whole process is all an
optical one, and the operational speed depends on the switching time of the
SOA. The proposed optical binary data multiplier is designed using the all
optical AND gate and all optical half adder and it is successfully simulated using
Opti system. The results thus obtained satisfy the truth table. Realization of
the all optical logic gates will provide not only increased speed and capacity
of telecommunication systems, but also various functionalities including
optical packet switching, add/drop, decision making, bit extraction,
regenerating, and basic or complex optical computing. Since all the conversion
techniques are based on frequency encoding/decoding technique, it is free from
bit error problems which exist in conventional encoding/decoding techniques.
Figure 1: Structure
of Semiconductor Optical Amplifier.
Figure 3: Gain Vs
Wavelength of Fabry-Perot And Travelling Wave Amplifier.
Figure 4: Optical HALF Adder.
Figure 5: Optical two-bit binary multiplier.
Figure 6: Optical Two-Bit
Binary Multiplier.
A |
B |
Carry |
Sum |
0 |
0 |
0 |
0 |
0 |
1 |
0 |
1 |
1 |
0 |
0 |
1 |
1 |
1 |
1 |
0 |
Table 1: Truth table of Optical HALF Adder.
INPUT |
OUTPUT |
||||||
A1 |
A0 |
B1 |
B0 |
S3 |
S2 |
S1 |
S0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
1 |
Table 2: Truth Table of Multiplier.